Without limiting the scope of the invention, its background is described in connection with the processing of silicon chips on silicon wafers, such as dynamic random access memory (DRAM), as an example.
Heretofore, in this field, the detection of defects on silicon wafers within individual silicon chips has been performed either manually, or using automated visual systems having a defect detection resolution of 2-4 microns. Unfortunately, the accuracy of detection in many cases was limited by the operator's ability to view a random sample of conventional silicon dies within a specified period of time.
Conventional automated systems have achieved up to a 90% success rate in detecting silicon wafers surface anomalies. These success rates, however, were achieved only under the best conditions of light and contrast. Importantly, reliability of conventional automated systems has been found to degrade rapidly if conditions of lighting and contrast are not ideal.
Furthermore, the limitations of current methods for automatically inspecting silicon dies for defects require substantial visual inspection by an operator. For example, the field of view of present systems is limited to one die, thereby excluding from analysis up to 60% of the available 256 kilobytes of data obtained from a field of view of 125.times.150 mils. This field of view limits spacial accuracy to about 1:16, with a sub-pixel alignment of 0.25. The problem of the limited field of view of present systems is exacerbated by the inherent difference in the lighting and contrast of the underlying silicon wafer background. The inability of present systems to cope with differences in lighting and contrast is a major stumbling block to further automation of silicon die analysis because differences in wafer background are found to occur even between different silicon wafer lots for the same type of silicon chip.
What is needed is an automated imaging system that is customizable for each silicon wafer that is processed. Also, a need has arisen for an automatic inspection system that is able to adapt to different silicon chip patterns, and that accurately detects surface defects on silicon dies on a silicon wafer. A need has further arisen for a system that is able to meet the needs of high throughput without a loss of accuracy. Finally, a need has arisen for an automated system that is able to adapt to the high precision needs of future silicon chip designs.